74LVC1G17中文资料Single-gate数据手册Diodes规格书

描述 Description

The 74LVC1G17 is a single 1-input Schmitt-trigger buffer with a standard totem pole output. The device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant to 5.5V allowing this device to be used in a mixed voltage environment. The device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output preventing damaging current backflow when the device is powered down.

特性 Features

•Wide Supply Voltage Range from 1.65V to 5.5V
•± 24mA Output Drive at 3.3V
•CMOS low power consumption
•IOFF Supports Partial-Power-Down Mode Operation
•Inputs accept up to 5.5V
•ESD Protection Exceeds JESD 22 - 200-V Machine Model (A115-A) - 2000-V Human Body Model (A114-A)
•Latch-Up Exceeds 100mA per JESD 78, Class II
•Range of Package Options
•All packages assemb°C with “Green” Molding Compound (no Br, Sb)
•Lead Free Finish/ RoHS Compliant

应用 Application

•Voltage Level Shifting
•General Purpose Logic
•Power Down Signal Isolation
•Wide array of products such as: - PCs, networking, notebooks, netbooks, PDAs - Computer peripherals, hard drives, CD/DVD ROM - TV, DVD, DVR, set top box - Cell Phones, Personal Navigation / GPS - MP3 players ,Cameras, Video Recorders

简介

74LVC1G17属于集成电路（IC）的缓冲器驱动器接收器收发器。由制造生产的74LVC1G17缓冲器，驱动器，接收器，收发器逻辑缓冲器、驱动器、接收器和收发器允许隔离对某个电路的逻辑信号的访问，以用于另一电路。缓冲器将其输入信号（不变或反相）传递到其输出，并可能用于清除弱信号或驱动负载。在布尔逻辑仿真器中，缓冲器主要用于增加传播延迟。逻辑接收器和收发器允许在数据总线之间进行隔离通信。