74LVC1G157GS数据手册集成电路（IC）的信号开关多路复用器解码器规格书PDF

描述 Description

The 74LVC1G157 is a single 2-input multiplexer which select data from two data inputs (I0andI1) under control of a common data select input (S). The state of the common data select input determines the particular register from which the data comes. The output (Y) presents the selected data in the true (non-inverted) form.
Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in mixed 3.3V and 5V applications.
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
Schmitt-trigger action at all inputs makes the circuit highly tolerant to slower input rise and falltimes.

特性 Features

• Wide supply voltage range from 1.65 V to 5.5 V
• High noise immunity
• Complies with JEDEC standard:
• JESD8-7 (1.65 V to 1.95 V)
• JESD8-5 (2.3 V to 2.7 V)
• JESD8B/JESD36 (2.7 V to 3.6 V)

• ±24 mA output drive (VCC = 3.0 V)
• CMOS low power consumption
• Latch-up performance exceeds 250 mA
• Direct interface with TTL levels
• Inputs accept voltages up to 5 V
• ESD protection:
• HBM JESD22-A114F exceeds 2000 V
• MM JESD22-A115-A exceeds 200 V

• Multiple package options
• Specified from -40 °C to +85 °C and -40 °C to +125 °C