74LVC1G16GF数据手册集成电路（IC）的缓冲器驱动器接收器收发器规格书PDF

描述 Description

Single buffer - The 74LVC1G16 provides a low-power, low-voltage single buffer. The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. Schmitt trigger action at all inputs makes the circuit highly tolerant of slower input rise and fall times.

特性 Features

·Wide supply voltage range from 1.65 V to 5.5 V
·5 V tolerant inputs for interfacing with 5 V logic
·High noise immunity
·Complies with JEDEC standard:·JESD8-7 (1.65 V to 1.95 V)
·JESD8-5 (2.3 V to 2.7 V)
·JESD8-B/JESD36 (2.7 V to 3.6 V)