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74LV138D-Q100数据手册Nexperia中文资料规格书

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厂商型号

74LV138D-Q100

功能描述

3-to-8 line decoder/demultiplexer; inverting

制造商

Nexperia Nexperia B.V. All rights reserved

中文名称

安世 安世半导体(中国)有限公司

数据手册

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更新时间

2025-8-9 9:21:00

人工找货

74LV138D-Q100价格和库存,欢迎联系客服免费人工找货

74LV138D-Q100规格书详情

描述 Description

The 74LV138-Q100 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The 74LV138-Q100 features three enable inputs (Y1, Y2 and E3). Every output will be HIGH unless Y1 and Y2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion of the 74LV138-Q100 to a 1-of-32 (5 to 32 lines) decoder with just four 74LV138 ICs and one inverter. The 74LV138-Q100 can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess VCC.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

技术参数

  • 制造商编号

    :74LV138D-Q100

  • 生产厂家

    :Nexperia

  • VCC (V)

    :1.0 - 5.5

  • Logic switching levels

    :TTL

  • Output drive capability (mA)

    :± 12

  • tpd (ns)

    :12

  • Power dissipation considerations

    :low

  • Tamb (°C)

    :-40~125

  • Rth(j-a) (K/W)

    :81

  • Ψth(j-top) (K/W)

    :4.5

  • Rth(j-c) (K/W)

    :39.5

  • Package name

    :SO16

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