74LV132PW中文资料Quad 2-input NAND Schmitt trigger数据手册Nexperia规格书

描述 Description

The 74LV132 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC132 and 74HCT132.
The 74LV132 contains four 2-input NAND gates which accept standard input signals. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.
The gate switches at different points for positive and negative-going signals. The difference between the positive voltage VT+ and the negative voltage VT- is defined as the input hysteresis voltage VH.

特性 Features

• Wide operating voltage: 1.0 V to 5.5 V
• Optimized for low voltage applications: 1.0 V to 3.6 V
• Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
• Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 °C
• Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and Tamb = 25 °C
• ESD protection:
• HBM JESD22-A114F exceeds 2000 V
• MM JESD22-A115-A exceeds 200 V

• Multiple package options
• Specified from -40 °C to +85 °C and from -40 °C to +125 °C

应用 Application

• Wave and pulse shapers for highly noisy environments
• Astable multivibrators
• Monostable multivibrators