Triple 3-input NAND gate

DESCRIPTION The 74LV10 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT10. The 74LV10 provides the 3-input NAND function. FEATURES • Optimized for Low Voltage applications: 1.0 to 3.6 V • Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V • Typi

文件：113.24 Kbytes 页数：10 Pages

PHI

PHI

Triple 3-input NAND gate

DESCRIPTION The 74LV10 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT10. The 74LV10 provides the 3-input NAND function. FEATURES • Optimized for Low Voltage applications: 1.0 to 3.6 V • Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V • Typi

文件：113.24 Kbytes 页数：10 Pages

PHI

PHI

Triple 3-input NAND gate

DESCRIPTION The 74LV10 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT10. The 74LV10 provides the 3-input NAND function. FEATURES • Optimized for Low Voltage applications: 1.0 to 3.6 V • Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V • Typi

文件：113.24 Kbytes 页数：10 Pages

PHI

PHI

Triple 3-input NAND gate

DESCRIPTION The 74LV10 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT10. The 74LV10 provides the 3-input NAND function. FEATURES • Optimized for Low Voltage applications: 1.0 to 3.6 V • Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V • Typi

文件：113.24 Kbytes 页数：10 Pages

PHI

PHI

Triple 3-input NAND gate

DESCRIPTION The 74LV10 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT10. The 74LV10 provides the 3-input NAND function. FEATURES • Optimized for Low Voltage applications: 1.0 to 3.6 V • Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V • Typi

文件：113.24 Kbytes 页数：10 Pages

PHI

PHI