Quad buffer/line driver 3-State

DESCRIPTION The 74LV125 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT125. FEATURES • Wide operating voltage: 1.0 to 5.5 V • Optimized for Low Voltage applications: 1.0 to 3.6 V • Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V • Typical VO

文件：111.47 Kbytes 页数：12 Pages

PHI

PHI

Quad buffer/line driver 3-State

DESCRIPTION The 74LV125 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT125. FEATURES • Wide operating voltage: 1.0 to 5.5 V • Optimized for Low Voltage applications: 1.0 to 3.6 V • Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V • Typical VO

文件：111.47 Kbytes 页数：12 Pages

PHI

PHI

Quad. Bus Buffer Gates with 3-state Outputs

Description The HD74LV125A features independent line drivers with three state outputs. Each output is disabled when the associated output enable (OE) input is high. To ensure the high impedance state during power up or power down, OE should be connected to VCC through a pull-down resistor; the mi

文件：65.59 Kbytes 页数：15 Pages

HITACHIHitachi Semiconductor

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Quad. Bus Buffer Gates with 3-state Outputs

Description The HD74LV125A features independent line drivers with three state outputs. Each output is disabled when the associated output enable (OE) input is high. To ensure the high impedance state during power up or power down, OE should be connected to VCC through a pull-down resistor; the mi

文件：80.57 Kbytes 页数：10 Pages

RENESAS

瑞萨

Quad. Bus Buffer Gates with 3-state Outputs

Description The HD74LV125A features independent line drivers with three state outputs. Each output is disabled when the associated output enable (OE) input is high. To ensure the high impedance state during power up or power down, OE should be connected to VCC through a pull-down resistor; the mi

文件：80.57 Kbytes 页数：10 Pages

RENESAS

瑞萨