丝印：74LS19A；Package：SOP；SCHMITT-TRIGGER POSITIVE-NAND GATES AND INVERTERS WITH TOTEM-POLE OUTPUTS

Functionally and Mechanically Identical to ‘L813, ‘LS14. and ‘LS132, Respectively Improved Line-Receiving Characteristics P-N-P Inputs Reduce System Loading Excellent Noise Immunity with Typical Hysteresis of 0.8 V description Each circuit functions as a NAND gate or inverter, but beca

文件：784.18 Kbytes 页数：15 Pages

TI

德州仪器

丝印：74LS240；Package：SO；SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

文件：1.80212 Mbytes 页数：41 Pages

TI

德州仪器

丝印：74LS240；Package：SO；SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

文件：1.80265 Mbytes 页数：41 Pages

TI

德州仪器

丝印：74LS241；Package：SO；SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

文件：1.80265 Mbytes 页数：41 Pages

TI

德州仪器

丝印：74LS241；Package：SO；SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

文件：1.80212 Mbytes 页数：41 Pages

TI

德州仪器

丝印：74LS244；Package：SO；SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

文件：1.80212 Mbytes 页数：41 Pages

TI

德州仪器

丝印：74LS244；Package：SO；SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

文件：1.80265 Mbytes 页数：41 Pages

TI

德州仪器

丝印：74LS244；Package：SO；SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

文件：1.80212 Mbytes 页数：41 Pages

TI

德州仪器

丝印：74LS244；Package：SO；SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

文件：1.80212 Mbytes 页数：41 Pages

TI

德州仪器

丝印：74LS244；Package：SO；SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

文件：1.80265 Mbytes 页数：41 Pages

TI

德州仪器