High-Speed CMOS Logic 3- to 8-Line Decoder/Demultiplexer Inverting and Noninverting

文件：765.4 Kbytes 页数：19 Pages

TI

德州仪器

3-to-8 line decoder/demultiplexer; inverting

GENERAL DESCRIPTION The 74HC/HCT138 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Demultiplexing capability • Multiple input enable for easy expansion • Ideal for memory

文件：50.49 Kbytes 页数：7 Pages

PHI

飞利浦

1?뭥f?? Decoder/ Demultiplexer High?뭁erformance Silicon?묰ate CMOS

文件：140.61 Kbytes 页数：9 Pages

ONSEMI

安森美半导体

3-to-8 line decoder/demultiplexer; inverting

GENERAL DESCRIPTION The 74HC/HCT138 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Demultiplexing capability • Multiple input enable for easy expansion • Ideal for memory

文件：50.49 Kbytes 页数：7 Pages

PHI

飞利浦

3 TO 8 LINE DECODER DEMULTIPLEXER

Description The 74HC138 is a high speed CMOS device. The device accepts a three bit binary weighted address on input pins A0, A1 and A2 and when enabled will produce one active low output with the remaing seven being high. There are two active LOW enable inputs E1 and E2, and one active HIGH en

文件：193.51 Kbytes 页数：10 Pages

DIODES

美台半导体