13-input NAND gate

GENERAL DESCRIPTION The HC133 is an high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard no. 7A. The 74HC133 provides the 13-input NAND function. FEATURES • Output capability: standard • ICC

文件：36.09 Kbytes 页数：5 Pages

PHI

PHI

13-input NAND gate

GENERAL DESCRIPTION The HC133 is an high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard no. 7A. The 74HC133 provides the 13-input NAND function. FEATURES • Output capability: standard • ICC

文件：36.09 Kbytes 页数：5 Pages

PHI

PHI

13-input NAND gate

GENERAL DESCRIPTION The HC133 is an high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard no. 7A. The 74HC133 provides the 13-input NAND function. FEATURES • Output capability: standard • ICC

文件：36.09 Kbytes 页数：5 Pages

PHI

PHI

13-INPUT NAND GATE

文件：165.27 Kbytes 页数：4 Pages

ETCList of Unclassifed Manufacturers

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13-input NAND Gate

Description This device contains a single 13-input NAND gate. They perform the boolean functions in positive logic. Features • High Speed Operation: tpd = 12.5 ns typ (CL = 50 pF) • High Output Current: Fanout of 10 LSTTL Loads • Wide Operating Voltage: VCC = 2 to 6 V • Low Input Current: 1

文件：52.21 Kbytes 页数：9 Pages

HITACHIHitachi Semiconductor

日立日立公司

13-input NAND Gate

Description This device contains a single 13-input NAND gate. They perform the boolean functions in positive logic. Features • High Speed Operation: tpd = 12.5 ns typ (CL = 50 pF) • High Output Current: Fanout of 10 LSTTL Loads • Wide Operating Voltage: VCC = 2 to 6 V • Low Input Current: 1

文件：91.29 Kbytes 页数：6 Pages

RENESAS

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