74AUP2G02DC集成电路（IC）的门反相器规格书PDF中文资料

厂商型号	74AUP2G02DC
参数属性	74AUP2G02DC 封装/外壳为8-VFSOP（0.091"，2.30mm 宽）；包装为卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带；类别为集成电路（IC）的门反相器；产品描述：IC GATE NOR 2CH 2-INP 8VSSOP
功能描述	Low-power dual 2-input NOR gate
丝印标识	p02
封装外壳	SOT765-1 / 8-VFSOP（0.091"，2.30mm 宽）
文件大小	269.23 Kbytes
页面数量	17 页
生产厂商	NEXPERIA
中文名称	安世
网址	网址
数据手册	下载地址一下载地址二到原厂下载
更新时间	2026-10-4 22:59:00
人工找货	74AUP2G02DC价格和库存，欢迎联系客服免费人工找货

1. General description

The 74AUP2G02 is a dual 2-input NOR gate. Schmitt-trigger action at all inputs makes the circuit

tolerant of slower input rise and fall times. This device ensures very low static and dynamic power

consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for

partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the

potentially damaging backflow current through the device when it is powered down.

2. Features and benefits

• Wide supply voltage range from 0.8 V to 3.6 V

• High noise immunity

• Complies with JEDEC standards:

• JESD8-12 (0.8 V to 1.3 V)

• JESD8-11 (0.9 V to 1.65 V)

• JESD8-7 (1.2 V to 1.95 V)

• JESD8-5 (1.8 V to 2.7 V)

• JESD8-B (2.7 V to 3.6 V)

• ESD protection:

• HBM JESD22-A114F Class 3A exceeds 5000 V

• MM JESD22-A115-A exceeds 200 V

• CDM JESD22-C101E exceeds 1000 V

• Low static power consumption; ICC = 0.9 μA (maximum)

• Latch-up performance exceeds 100 mA per JESD78B Class II

• Inputs accept voltages up to 3.6 V

• Low noise overshoot and undershoot < 10 of VCC

• IOFF circuitry provides partial power-down mode operation

• Multiple package options

• Specified from -40 °C to +85 °C and -40 °C to +125 °C