74AUP1G74中文资料Low Power Single D-Type Positive Edge-Triggered Flip-Flop with Clear and Preset数据手册SGMICRO规格书

描述 Description

The 74AUP1G74 is a low power single positive edge-triggered D-Type flip-flop with clear and preset functions. This device can operate in the supply voltage range from 0.8V to 3.6V.
No matter what the levels of the other inputs are, the preset (PRE) input or clear (CLR) input can be pulled low to set or reset the outputs. When the preset input and clear input are held high, data at the D input that suffices for setup time purposes is moved to the Q output on the low-to-high clock transition. After the hold time interval, data at the D input can be changed without any influence on output levels. Clock triggering appears at a voltage level which is uncorrelated with the rise time of the clock pulse.
This device is highly suitable for partial power-down applications using power-off leakage current (IOFF) circuit.
The 74AUP1G74 is available in a Green VSSOP-8 package. It operates over an ambient temperature range of -40℃ to +125℃.

特性 Features

Wide Supply Voltage Range: 0.8V to 3.6V
Inputs Accept Voltages Higher than the Supply Voltage
+4mA/-4mA Output Current
Low Static Power Dissipation: ICC = 1μA (MAX)
Low Dynamic Power Dissipation: CPD = 5.5pF (TYP) at VCC = 3.3V
Input Capacitance: CI = 4pF (TYP)
Propagation Delay: tPD = 9ns (MAX) at VCC = 3.3V
The Overshoot and Undershoot of Low Noise are Less than 10% of VCC
Applicable to Point-to-Point
Latch-up Performance (> 100mA) Meets JESD 78 Class II Standard
Outputs in High-Impedance State when VCC = 0V
-40℃ to +125℃ Operating Temperature Range
Available in a Green VSSOP-8 Package