74AHC139PW中文资料Dual 2-to-4 line decoder/demultiplexer数据手册Nexperia规格书

描述 Description

The 74AHC139; 74AHCT139 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A.
The 74AHC139; 74AHCT139 is a high-speed, dual 2-to-4 line decoder/demultiplexer. This device has two independent decoders, each accepting two binary weighted inputs (nA0 and nA1) and providing four mutually exclusive active LOW outputs (nY0 to nY3). Each decoder has an active LOW enable input (nE). When nE is HIGH, every output is forced HIGH. The enable input can be used as the data input for a 1-to-4 demultiplexer application.
The 74AHC139; 74AHCT139 is identical to the HEF4556 of the HE4000B family.

特性 Features

• Balanced propagation delays
• All inputs have Schmitt-trigger actions
• Inputs accept voltages higher than VCC
• Input levels:
• For 74AHC139: CMOS level
• For 74AHCT139: TTL level

• ESD protection:
• HBM EIA/JESD22-A114E exceeds 2000 V
• MM EIA/JESD22-A115-A exceeds 200 V
• CDM EIA/JESD22-C101C exceeds 1000 V

• Multiple package options
• Specified from -40 Cel to +85 Cel and from -40 Cel to +125 Cel