3.3V 128K x 36 Synchronous PipeLined Burst SRAM w/3.3V I/O

The 71V3576 3.3V CMOS SRAM is organized as 128K x 36. The 71V3576 SRAM contains write, data, address and control registers. The burst mode feature offers the highest level of performance to the system designer, as it can provide four cycles of data for a single address presented to the SRAM. High system speed 150MHz (3.8ns clock access time)\nLBO input selects interleaved or linear burst mode\nSelf-timed write cycle with global write control (GW), byte write enable (BWE), and byte writes (BWx)\n3.3V core power supply\nPower down controlled by ZZ input\n3.3V I/O\nAvailable in 100-pin TQF;

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128K x 36 3.3V Synchronous SRAMs 3.3V I/O, Pipelined Outputs Burst Counter, Single Cycle Deselect

Features ◆ 128K x 36 memory configurations ◆ Supports high system speed: Commercial: – 200MHz 3.1ns clock access time Commercial and Industrial: – 183MHz 3.3ns clock access time – 166MHz 3.5ns clock access time ◆ LBO input selects interleaved or linear burst mode ◆ 3.3V core power supply

文件：319.72 Kbytes 页数：23 Pages

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128K x 36 3.3V Synchronous SRAMs 3.3V I/O, Pipelined Outputs Burst Counter, Single Cycle Deselect

Features ◆ 128K x 36 memory configurations ◆ Supports high system speed: Commercial: – 200MHz 3.1ns clock access time Commercial and Industrial: – 183MHz 3.3ns clock access time – 166MHz 3.5ns clock access time ◆ LBO input selects interleaved or linear burst mode ◆ 3.3V core power supply

文件：319.72 Kbytes 页数：23 Pages

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128K x 36 3.3V Synchronous SRAMs 3.3V I/O, Pipelined Outputs Burst Counter, Single Cycle Deselect

Features ◆ 128K x 36 memory configurations ◆ Supports high system speed: Commercial: – 200MHz 3.1ns clock access time Commercial and Industrial: – 183MHz 3.3ns clock access time – 166MHz 3.5ns clock access time ◆ LBO input selects interleaved or linear burst mode ◆ 3.3V core power supply

文件：319.72 Kbytes 页数：23 Pages

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128K x 36 3.3V Synchronous SRAMs 3.3V I/O, Pipelined Outputs Burst Counter, Single Cycle Deselect

Features ◆ 128K x 36 memory configurations ◆ Supports high system speed: Commercial: – 200MHz 3.1ns clock access time Commercial and Industrial: – 183MHz 3.3ns clock access time – 166MHz 3.5ns clock access time ◆ LBO input selects interleaved or linear burst mode ◆ 3.3V core power supply

文件：319.72 Kbytes 页数：23 Pages

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128K x 36 3.3V Synchronous SRAMs 3.3V I/O, Pipelined Outputs Burst Counter, Single Cycle Deselect

Features ◆ 128K x 36 memory configurations ◆ Supports high system speed: Commercial: – 200MHz 3.1ns clock access time Commercial and Industrial: – 183MHz 3.3ns clock access time – 166MHz 3.5ns clock access time ◆ LBO input selects interleaved or linear burst mode ◆ 3.3V core power supply

文件：319.72 Kbytes 页数：23 Pages

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瑞萨

128K x 36 3.3V Synchronous SRAMs 3.3V I/O, Pipelined Outputs Burst Counter, Single Cycle Deselect

Features ◆ 128K x 36 memory configurations ◆ Supports high system speed: Commercial: – 200MHz 3.1ns clock access time Commercial and Industrial: – 183MHz 3.3ns clock access time – 166MHz 3.5ns clock access time ◆ LBO input selects interleaved or linear burst mode ◆ 3.3V core power supply

文件：319.72 Kbytes 页数：23 Pages

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瑞萨

128K x 36 3.3V Synchronous SRAMs 3.3V I/O, Pipelined Outputs Burst Counter, Single Cycle Deselect

Features ◆ 128K x 36 memory configurations ◆ Supports high system speed: Commercial: – 200MHz 3.1ns clock access time Commercial and Industrial: – 183MHz 3.3ns clock access time – 166MHz 3.5ns clock access time ◆ LBO input selects interleaved or linear burst mode ◆ 3.3V core power supply

文件：319.72 Kbytes 页数：23 Pages

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瑞萨

128K x 36 3.3V Synchronous SRAMs 3.3V I/O, Pipelined Outputs Burst Counter, Single Cycle Deselect

Features ◆ 128K x 36 memory configurations ◆ Supports high system speed: Commercial: – 200MHz 3.1ns clock access time Commercial and Industrial: – 183MHz 3.3ns clock access time – 166MHz 3.5ns clock access time ◆ LBO input selects interleaved or linear burst mode ◆ 3.3V core power supply

文件：319.72 Kbytes 页数：23 Pages

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瑞萨

128K x 36 3.3V Synchronous SRAMs 3.3V I/O, Pipelined Outputs Burst Counter, Single Cycle Deselect

Features ◆ 128K x 36 memory configurations ◆ Supports high system speed: Commercial: – 200MHz 3.1ns clock access time Commercial and Industrial: – 183MHz 3.3ns clock access time – 166MHz 3.5ns clock access time ◆ LBO input selects interleaved or linear burst mode ◆ 3.3V core power supply

文件：319.72 Kbytes 页数：23 Pages

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