丝印：65LVDS152；Package：TSSOP；MuxIt™ RECEIVER-DESERIALIZER

1FEATURES 2• A Member of the MuxIt™ Serializer- Deserializer Building-Block Chip Family • Supports Deserialization of One Serial Link Data Channel Input at Rates up to 200 Mbps • PLL Lock/Valid Input Provided to Enable Parallel Data and Clock Outputs • Cascadable With Additional SN65LVDS152

文件：239.32 Kbytes 页数：18 Pages

TI

德州仪器

丝印：65LVDS152；Package：TSSOP；MuxIt™ RECEIVER-DESERIALIZER

1FEATURES 2• A Member of the MuxIt™ Serializer- Deserializer Building-Block Chip Family • Supports Deserialization of One Serial Link Data Channel Input at Rates up to 200 Mbps • PLL Lock/Valid Input Provided to Enable Parallel Data and Clock Outputs • Cascadable With Additional SN65LVDS152

文件：239.32 Kbytes 页数：18 Pages

TI

德州仪器

丝印：65LVDS152；Package：TSSOP；MuxIt™ RECEIVER-DESERIALIZER

1FEATURES 2• A Member of the MuxIt™ Serializer- Deserializer Building-Block Chip Family • Supports Deserialization of One Serial Link Data Channel Input at Rates up to 200 Mbps • PLL Lock/Valid Input Provided to Enable Parallel Data and Clock Outputs • Cascadable With Additional SN65LVDS152

文件：239.32 Kbytes 页数：18 Pages

TI

德州仪器

丝印：65LVDS152；Package：TSSOP；MuxIt™ RECEIVER-DESERIALIZER

1FEATURES 2• A Member of the MuxIt™ Serializer- Deserializer Building-Block Chip Family • Supports Deserialization of One Serial Link Data Channel Input at Rates up to 200 Mbps • PLL Lock/Valid Input Provided to Enable Parallel Data and Clock Outputs • Cascadable With Additional SN65LVDS152

文件：239.32 Kbytes 页数：18 Pages

TI

德州仪器