5P49V6968开发板套件编程器的评估演示板及套件规格书PDF中文资料

描述 Description

The 5P49V6968 is a programmable clock generator that is

intended for high-performance consumer, networking, industrial,

computing, and data communications applications. This is

Renesas’ sixth generation of programmable clock technology

(VersaClock 6E).

The 5P49V6968 generates the frequencies from a single

reference clock, which can originate from one of the two

redundant clock inputs. A glitchless manual switchover function

allows one of the redundant clocks to be selected during normal

operation.

Two select pins allow up to four different configurations to be

programmed, and can be used for different operating modes.

特性 Features

 Flexible 1.8V, 2.5V, and 3.3V power rails

 High-performance, low phase noise PLL, < 0.5ps RMS typical

phase jitter on outputs

 Four banks of internal OTP memory

• In-system or factory programmable

 I

2C serial programming interface

• 0xD0 or 0xD4 I

2C address options allow multiple devices to

be configured in a same system

 Reference LVCMOS output clock

 Three universal configurable outputs (OUT1, 2, 4):

• Differential (LVPECL, LVDS, or HCSL) 1kHz to 350MHz

• Two single-ended (in-phase or 180 degrees out of phase)

1kHz to 200MHz

• I/O VDDs can be mixed and matched, supporting 1.8V

(LVDS and LVCMOS), 2.5V, or 3.3V

• Independent spread spectrum on each output pair

 Eight additional LPHCSL outputs (OUT 3, 5–11)

• 1.8V low power supply

• 1kHz to 200MHz

 Programmable output enable or power-down mode

 Redundant clock inputs with manual switchover

 Available in 6 × 6 mm 48-VFQFPN package

 -40° to +85°C industrial temperature operation