Dual JK Positive Edge-Triggered Flip-Flop

文件：167.82 Kbytes 页数：8 Pages

NSC

国半

Dual JK Positive Edge-Triggered Flip-Flop

文件：167.82 Kbytes 页数：8 Pages

NSC

国半

Dual J-K Flip-Flop with Set and Reset

Description The CD54AC109/3A and CD54ACT109/3A are dual “J-K” flip-flops with set and reset that utilize the Harris Advanced CMOS Logic technology. These flip-flops have independent J, K, Set, Reset and Clock inputs and Q and Q outputs. The CD54AC109/3A and CD54ACT109/3A changes state on the posi

文件：10.39 Kbytes 页数：1 Pages

INTERSIL

Dual j-k Flip-Flop with Set and Reset

文件：228.31 Kbytes 页数：8 Pages

TI

德州仪器