丝印：527R-04LF；Package：SSOP；CLOCK SLICER USER CONFIGURABLE PECL INPUT ZDB

Features • Packaged as 28-pin SSOP (150 mil body) • Synchronizes fractional clocks rising edges • CMOS in to PECL out • PECL in to PECL out • Pin selectable dividers • Zero input to output skew • User determines the output frequency - no software needed • Slices frequency or period • Inp

文件：379.45 Kbytes 页数：10 Pages

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瑞萨

丝印：527R-04LF；Package：SSOP；CLOCK SLICER USER CONFIGURABLE PECL INPUT ZDB

Features • Packaged as 28-pin SSOP (150 mil body) • Synchronizes fractional clocks rising edges • CMOS in to PECL out • PECL in to PECL out • Pin selectable dividers • Zero input to output skew • User determines the output frequency - no software needed • Slices frequency or period • Inp

文件：379.45 Kbytes 页数：10 Pages

RENESAS

瑞萨

丝印：527R-04LF；Package：SSOP；CLOCK SLICER USER CONFIGURABLE PECL INPUT ZDB

Features • Packaged as 28-pin SSOP (150 mil body) • Synchronizes fractional clocks rising edges • CMOS in to PECL out • PECL in to PECL out • Pin selectable dividers • Zero input to output skew • User determines the output frequency - no software needed • Slices frequency or period • Inp

文件：379.45 Kbytes 页数：10 Pages

RENESAS

瑞萨

丝印：527R-04LF；Package：SSOP；CLOCK SLICER USER CONFIGURABLE PECL INPUT ZDB

Features • Packaged as 28-pin SSOP (150 mil body) • Synchronizes fractional clocks rising edges • CMOS in to PECL out • PECL in to PECL out • Pin selectable dividers • Zero input to output skew • User determines the output frequency - no software needed • Slices frequency or period • Inp

文件：379.45 Kbytes 页数：10 Pages

RENESAS

瑞萨