ZL30671数据手册集成电路（IC）的应用特定时钟/定时规格书PDF

描述 Description

The ZL30671 offers one channel of Synchronous Ethernet (SyncE) packet clock synchronization. Using Microsemi’s miTimePLL timing technology, this device offers new and improved features for 5G transport and wireless infrastructure equipment.  Each device integrates all features required by a timing card PLL and line card PLL. High integration along with ultra-low jitter make this device ideal for use in chassis based systems with active and redundant timing cards as well as in single board (“pizza box”) applications where a timing device needs to have features of both a timing and a line card PLL.

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特性 Features

• Precise phase/frequency measurement and tuning lower system latency to meet 4G LTE, 5G & Wireless Infrastructure
• Ultra-fast lock to GPS/GNSS and 1PPS for faster power-up time for 4G LTE, 5G & Wireless Infrastructure
• Precise chip-to-chip time interfaces use less backplane traces for 1PPS distribution for chassis systems
• Split oscillator option lowers cost, lowers jitter, and provides redundancy
• Fully compliant to EEC (G.8262), SEC (G.813), GR-253 SMC and GR-1244 Stratum 3/3E
• Excellent jitter performance of

简介

ZL30671属于集成电路（IC）的应用特定时钟/定时。由制造生产的ZL30671应用特定时钟/定时专用时钟和计时 IC（集成电路）产品族中的产品主要用于执行与时间或频率信息生成和分配相关的各种操作，适合的设计环境较特定，例如 AMD 和 Intel 的中央处理单元 (CPU) 或图形处理单元 (GPU)、DVD 音频设备、蓝光光盘播放器、以太网设备、PCIe、SATA、光纤通道接口、车载娱乐总线等。