INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER

GENERAL DESCRIPTION The XRK7988 is a PLL clock driver designed specifically for redundant clock tree designs. The device receives two differential LVPECL clock signals from which it generates 5 new differential LVPECL clock outputs. Two of the output pairs regenerate the input signals frequency

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EXAR

艾科嘉

INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER

GENERAL DESCRIPTION\nThe XRK7988 is a PLL clock driver designed specifically for redundant clock tree designs. The device receives two differential LVPECL clock signals from which it generates 5 new differential LVPECL clock outputs. Two of the output pairs regenerate the input signals frequency and • Fully Integrated PLL\n• LVPECL Clock Outputs\n• 3.3V Operation\n• 19.44 to 155.52 MHz;

MaxLinear

迈凌

Low Skew, Category 5e, 4-24 AWG pairs, CMP

Product Description Category 5e, 24 AWG bonded pairs solid bare copper conductors, plenum, FEP Teflon® insulation, skew 9.0ns/100m nominal, rip cord, Flamarrest® jacket.

文件：229 Kbytes 页数：3 Pages

BELDEN

百通

Low Skew, Category 5e, 4-24 AWG pairs, CMR

Product Description Category 5e, 24 AWG bonded pairs solid bare copper conductors, non-plenum, polyolefin insulation, skew 9.0ns/100m nominal, rip cord, PVC jacket.

文件：227.83 Kbytes 页数：3 Pages

BELDEN

百通

16-Bit, 2 MSPS, 關Module Data Acquisition Solution

文件：3.65397 Mbytes 页数：38 Pages

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