W631GG6NB中文资料双倍数据传输速率同步动态随机存取内存-第三代数据手册Winbond规格书

描述 Description

The W631GG6NB is a 1G bits DDR3 SDRAM and speed involving -09, 09I, 09J, -11, 11I, 11J, -12, 12I, 12J, -15, 15I and 15J

特性 Features

Double Data Rate architecture: two data transfers per clock cycle
• CAS Latency: 5, 6, 7, 8, 9, 10, 11, 13 and 14
• Programmable read burst ordering: interleaved or nibble sequential
• Edge-aligned with Read data and center-aligned with Write data
• Differential clock inputs (CK and /CK# )
• Posted CAS with programmable additive latency (AL = 0, CL - 1 and CL - 2) for improved command, address and data bus efficiency
• Auto-precharge operation for read and write bursts
• Precharged Power Down and Active Power Down
• Programmable CAS Write Latency (CWL) per operating frequency
• Multi purpose register (MPR) for readout a predefined system timing calibration bit sequence
• ZQ Calibration for output driver and ODT using external reference resistor to ground
• Programmable on-die termination (ODT) for data, data mask and differential strobe pairs
• 2K Byte page size
• Interface: SSTL_15