VP0550数据手册Microchip中文资料规格书

描述 Description

This enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown.Vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired.

特性 Features

Free from secondary breakdown
Low power drive requirement
Ease of paralleling
Low CISS and fast switching speeds
Excellent thermal stability
Integral source-drain diode
High input impedance and high gain