CMOS Synchronous Dynamic RAM

Description The device is CMOS Synchronous Dynamic RAM organized as 16,777,216 - word x 4 -bit x 4 - bank, 8,388,608 - word x 8 - bit x 4 - bank, or 4,194,304 - word x 16 - bit x 4 - bank. These various organizations provide wide choice for different applications. It is designed with the state-of

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VML

世界先进

CMOS Synchronous Dynamic RAM

VIS

世界先进

SOP8

FUDAN

上海复旦微

上传：深圳市冠亿通科技有限公司

PLCC

VLSI

上传：深圳市昌和盛利电子有限公司