V62/24619-01XE中文资料德州仪器数据手册PDF规格书

1 Features

• Vendor item drawing available, VID V62/24619

• Total ionizing dose characterized at 30 krad (Si)

– Total ionizing dose radiation lot acceptance

testing (TID RLAT) for every wafer lot to 30

krad (Si)

• Single-event effects (SEE) characterized:

– Single event latch-up (SEL) immune to linear

energy transfer (LET) = 43 MeV-cm2 /mg

– Single event transient (SET) characterized to

43 MeV-cm2 /mg

• Wide operating range of 1.2V to 5.5V

• Single-supply translating gates at

5/3.3/2.5/1.8/1.2V VCC

– TTL compatible inputs:

• Up translation:

– 1.8V – Inputs from 1.2V

– 2.5V – Inputs from 1.8V

– 3.3V – Inputs from 1.8V, 2.5V

– 5.0V – Inputs from 2.5V, 3.3V

• Down translation:

– 1.2V – Inputs from 1.8V, 2.5V, 3.3V, 5.0V

– 1.8V – Inputs from 2.5V, 3.3V, 5.0V

– 2.5V – Inputs from 3.3V, 5.0V

– 3.3V – Inputs from 5.0V

• 5.5V tolerant input pins

• Output drive up to 25mA AT 5V

• Latch-up performance exceeds 250mA per

JESD 17

• Space enhanced plastic (SEP)

– Controlled baseline

– Gold bondwire

– NiPdAu lead finish

– One assembly and test site

– One fabrication site

– Military (–55°C to 125°C) temperature range

– Extended product life cycle

– Product traceability

– Meets NASAs ASTM E595 outgassing

specification

2 Applications

• Enable or disable a digital signal

• Controlling an indicator LED

• Translation between communication modules and

system controllers

3 Description

The SN54SC6T17-SEP device contains six

independent Buffers with Schmitt-trigger inputs. Each

gate performs the Boolean function Y = A in positive

logic. The output level is referenced to the supply

voltage (VCC) and supports 1.8V, 2.5V, 3.3V, and 5V

CMOS levels.

The input is designed with a lower threshold circuit to

support up translation for lower voltage CMOS inputs

(for example 1.2V input to 1.8V output or 1.8V input

to 3.3V output). Additionally, the 5V tolerant input pins

enable down translation (for example 3.3V to 2.5V

output).