UPD77110中文资料瑞萨数据手册PDF规格书

FEATURES

- Instruction cycle (operating clock)

UPD77110: 15.3 ns MIN (65 MHz MAX)

13.3 ns MIN (75 MHz MAX) (Operating voltage and ambient temperature are limited.)

UPD77111: 13.3 ns MIN (75 MHz MAX)

UPD77112: 13.3 ns MIN (75 MHz MAX)

- Memory

• Internal instruction memory

UPD77110: RAM 35.5K words ´ 32 bits

UPD77111: RAM 1K words ´ 32 bits

Mask ROM 31.75K words ´ 32 bits

UPD77112: RAM 1K words ´ 32 bits

Mask ROM 31.75K words ´ 32 bits

• Data memory

UPD77110: RAM 24K words ´ 16 bits ´ 2 banks

External memory space 32K words ´ 16 bits ´ 2 banks

UPD77111: RAM 3K words ´ 16 bits ´ 2 banks

Mask ROM 16K words ´ 16 bits ´ 2 banks

UPD77112: RAM 3K words ´ 16 bits ´ 2 banks

Mask ROM 16K words ´ 16 bits ´ 2 banks

External memory space 16K words ´ 16 bits ´ 2 banks