384-OUTPUT TFT-LCD SOURCE DRIVER COMPATIBLE WITH 256-GRAY SCALES

DESCRIPTION The µ PD16750 is a source driver for TFT-LCDs capable of dealing with displays with 256-gray scales. Data input is based on digital input configured as 8 bits by 6 dots (2 pixels), which can realize a full-color display of 16,777,216 colors by output of 256 values γ -corrected by an

文件：188.55 Kbytes 页数：9 Pages

NEC

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MOS INTEGRATED CIRCUIT

FEATURES · CMOS level input · 384 outputs · Input of 8 bits (gradation data) by 6 dots · Capable of outputting 256 values by means of 8-by-2 external power modules (16 units) and a D/A converter · Output dynamic range: VDD2 – 0.2 V to VSS2 + 0.2 V · High-speed data transfer: fCLK = 40 MHz (i

文件：361.91 Kbytes 页数：26 Pages

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384-OUTPUT TFT-LCD SOURCE DRIVER(COMPATIBLE WITH 256-GRAY SCALES)

DESCRIPTION\nThe µ PD16750 is a source driver for TFT-LCDs capable of dealing with displays with 256-gray scales. Data input is based on digital input configured as 8 bits by 6 dots (2 pixels), which can realize a full-color display of 16,777,216 colors by output of 256 values γ -corrected by an int • CMOS level input\n• 384 outputs\n• Input of 8 bits (gradation data) by 6 dots\n• Capable of outputting 256 values by means of 8-by-2 external power modules (16 units) and a D/A converter\n• Output dynamic range: VDD2 – 0.2 V to VSS2 + 0.2 V\n• High-speed data transfer: fCLK = 40 MHz (internal data;

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瑞萨

384-OUTPUT TFT-LCD SOURCE DRIVER COMPATIBLE WITH 256-GRAY SCALES

DESCRIPTION The µ PD16750 is a source driver for TFT-LCDs capable of dealing with displays with 256-gray scales. Data input is based on digital input configured as 8 bits by 6 dots (2 pixels), which can realize a full-color display of 16,777,216 colors by output of 256 values γ -corrected by an

文件：188.55 Kbytes 页数：9 Pages

NEC

瑞萨

MOS INTEGRATED CIRCUIT

FEATURES · CMOS level input · 384 outputs · Input of 8 bits (gradation data) by 6 dots · Capable of outputting 256 values by means of 8-by-2 external power modules (16 units) and a D/A converter · Output dynamic range: VDD2 – 0.2 V to VSS2 + 0.2 V · High-speed data transfer: fCLK = 40 MHz (i

文件：361.91 Kbytes 页数：26 Pages

RENESAS

瑞萨