UPB1009K-E1

NECs LOW POWER GPS RF RECEIVER BIPOLAR ANALOG INTEGRATED CIRCUIT

DESCRIPTION TheµPB1009KisasiliconmonolithicICdevelopedforGPSreceivers.ThisICintegratesafullVCO,secondIFfilter,4-bitADC,anddigitalcontrolinterfacetoreducecostandmountingspace.Inaddition,itspowerconsumptionislow. Moreover,useofaTCXOwithfrequencyof16.36

UPB1009K-E1

BIPOLAR ANALOG DIGITAL INTEGRATED CIRCUIT

FEATURES •Doubleconversion:fREFin=16.368MHz,f1stIFin=61.380MHz,f2ndIFin=4.092MHz :fREFin=14.4,16.384,19.2,26MHz,f1stIFin=62.980MHz,f2ndIFin=2.556MHz •Multiplesystemclocks:On-chipswitchablefrequencydivider(1/N=100,3/256,9/1024,65/4096) •A/Dconverter

UPB1009K-E1-A

LOW POWER GPS RF RECEIVER BIPOLAR ANALOG INTEGRATED CIRCUIT