LOW POWER GPS RF RECEIVER BIPOLAR ANALOG INTEGRATED CIRCUIT

文件：2.2246 Mbytes 页数：28 Pages

CEL

BIPOLAR ANALOG DIGITAL INTEGRATED CIRCUIT

FEATURES • Double conversion : fREFin = 16.368 MHz, f1stIFin = 61.380 MHz, f2ndIFin = 4.092 MHz : fREFin = 14.4, 16.384, 19.2, 26 MHz, f1stIFin = 62.980 MHz, f2ndIFin = 2.556 MHz • Multiple system clocks : On-chip switchable frequency divider (1/N = 100, 3/256, 9/1024, 65/4096) • A/D converter

文件：432.36 Kbytes 页数：31 Pages

RENESAS

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NECs LOW POWER GPS RF RECEIVER BIPOLAR ANALOG INTEGRATED CIRCUIT

DESCRIPTION The µPB1009K is a silicon monolithic IC developed for GPS receivers. This IC integrates a full VCO, second IF filter, 4-bit ADC, and digital control interface to reduce cost and mounting space. In addition, its power consumption is low. Moreover, use of a TCXO with frequency of 16.36

文件：344.04 Kbytes 页数：27 Pages

NEC

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SSOP8

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SOP

NEC

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上传：深圳市鸿昌盛电子科技有限公司