UCC27523DGNR集成电路（IC）的栅极驱动器规格书PDF中文资料

UCC27523DGNR属于集成电路（IC）的栅极驱动器。由德州仪器制造生产的UCC27523DGNR栅极驱动器栅极驱动器电源管理集成电路 (PMIC) 可用于提供隔离、放大、参考位移、自举或其他必要功能，这些功能可将来自电源转换应用中控制设备的信号连接到电源被控制通过的半导体设备（通常为 FET 或 IGBT）。任何特定设备提供的确切功能各不相同，但与它适合驱动的半导体配置相关。

1 Features

• Industry-standard pinout

• Two independent gate-drive channels

• 5A peak source and sink-drive current

• Independent-enable function for each output

• TTL and CMOS compatible logic threshold

independent of supply voltage

• Hysteretic-logic thresholds for high noise immunity

• Inputs and enable pin-voltage levels not restricted

by VDD pin bias supply voltage

• 4.5V to 18V single-supply range

• Outputs held low during VDD-UVLO, (ensures

glitch-free operation at power up and power down)

• Fast propagation delays (13ns typical)

• Fast rise and fall times (7ns and 6ns typical)

• 1ns typical delay matching between two channels

• Two outputs are in parallel for higher drive current

• Outputs held low when inputs floating

• PDIP (8), SOIC (8), MSOP (8) PowerPAD™ and

3mm × 3mm WSON-8 package options

• Operating temperature range of –40°C to 140°C

2 Applications

• Switched-mode power supplies

• DC-DC converters

• Motor control, solar power

• Gate drive for emerging wide band-gap power

devices such as GaN

3 Description

The UCC2752x family of devices are dual-channel,

high-speed, low-side gate-driver devices capable

of effectively driving MOSFET and IGBT power

switches. Using a design that inherently minimizes

shoot-through current, UCC2752x can deliver highpeak

current pulses of up to 5A source and 5A

sink into capacitive loads along with rail-to-rail drive

capability and extremely small propagation delay

(typically 13ns). In addition, the drivers feature

matched internal propagation delays between the

two channels. These delays are very well suited for

applications requiring dual-gate drives with critical

timing, such as synchronous rectifiers. This also

enables connecting two channels in parallel to

effectively increase current-drive capability or driving

two switches in parallel with one input signal.

The input pin thresholds are based on TTL and

CMOS compatible low-voltage logic, which is fixed

and independent of the VDD supply voltage. Wide

hysteresis between the high and low thresholds offers

excellent noise immunity.