TX73L64数据手册TI中文资料规格书

描述 Description

TX73L64 is a highly integrated, high-performance transmitter device for ultrasound imaging system. The device has total 64 pulser circuits, 64 transmit/ receive switches (referred as T/R or TR switches), 32 LNA circuits, and supports on-chip beamformer (TxBF). The T/R switches also perform a 2:1 multiplexing operation to multiplex inputs of 2 channels to 1 LNA. The device also integrates on-chip floating power supplies that reduce the number of required high voltage power supplies.

TX73L64 has a pulser circuit that generates three-level high voltage pulses (up to ±100 V) that is used to excite multiple channels of an ultrasound transducer. The device supports total 64 outputs. The maximum output current is 1A.

Device can be used as a transmitter device for many applications like ultrasound imaging, non-destructive testing, SONAR, LIDAR, marine navigation system, brain imaging systems and so on.

特性 Features

Transmitter supports:

64-channel 3-level pulser and active transmit/ receive (T/R) switch



3-level pulser:

Maximum output voltage: ±100V

Minimum output voltage: ±1V

Maximum output current: 1A

True return to zero to discharge output to ground

Second harmonic of –40dBc at 5MHz

–3-dB Bandwidth with 400Ω || 125pF load

22MHz for a ±100-V supply



Very low receive power: 2.8mW/ch



Active transmit/receive (T/R) switch with:

Turn on resistance of 22Ω

Turn on and Turn off time: 100ns

2:1 Channel Muxing to LNA input



LNA

Supports a maximum input swing of 500mVpp

Gain of 24dB

HD2 of -55 dBc and HD3 of 40dBc at 5MHz

Programmable input impedance to match source impedance 100, 200. 400 and 800Ω with DTGC support



On-chip beam former with:

Channel based T/R switch on and off controls

Delay resolution: half beamformer clock period, minimum 2.5ns

Maximum delay: 214 beamformer clock period

Maximum beamformer clockspeed: 200MHz

On-Chip RAM for pattern and delay profile

One 512 × 32 memory to store beam-former pattern and delay for a group of 4 channels

Global repeat feature present, enabling long duration patterns



High-speed (400MHz maximum), 2-lane LVDS serial programming interface.

Low programming time: ≈1µs for delay profile update

32-bit Checksum to detect wrong SPI writes



Supports CMOS serial programming interface (50MHz maximum)

High reliability features:

Internal temperature sensor and automatic thermal shutdown

No specific power sequencing requirement

Error flag register to detect faulty conditions

Integrated passives for the floating supplies and bias voltages

Small package: FC-BGA-196 (12mm × 12mm) with 0.8mm pitch