TP5322N8说明书PDF资料贸易商SUTEXSUTEX-114ic电子网

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型号	下载订购	功能描述	制造商上传企业	LOGO
TP5322N8	文件：306.65 Kbytes Page：2 Pages	P-Channel Enhancement-Mode Vertical DMOS FET General Description These low threshold enhancement-mode (normally-off) transistors utilize an advanced vertical DMOS structure and Supertexs well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the 文件：306.65 Kbytes 页数：2 Pages	SUTEX	SUTEX
TP5322N8	文件：516.86 Kbytes Page：2 Pages	P-Channel Enhancement-Mode Vertical DMOS FETs 文件：516.86 Kbytes 页数：2 Pages	SUTEX	SUTEX
TP5322N8-G	文件：306.65 Kbytes Page：2 Pages	P-Channel Enhancement-Mode Vertical DMOS FET General Description These low threshold enhancement-mode (normally-off) transistors utilize an advanced vertical DMOS structure and Supertexs well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the 文件：306.65 Kbytes 页数：2 Pages	SUTEX	SUTEX
TP5322N8-G	文件：516.86 Kbytes Page：2 Pages	P-Channel Enhancement-Mode Vertical DMOS FETs 文件：516.86 Kbytes 页数：2 Pages	SUTEX	SUTEX
TP5322N8-G	文件：686.91 Kbytes Page：4 Pages	P-Channel Enhancement-Mode Vertical DMOS FET 文件：686.91 Kbytes 页数：4 Pages	SUTEX	SUTEX

更多TP5322N8供应商更新时间2022-6-12 10:12:00