TP0606中文资料P-Channel Enhancement-Mode Vertical DMOS FET数据手册Microchip规格书

描述 Description

General Description
This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input impedance and positive temperature coeffcient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired.

特性 Features

► Low threshold (-2.4V max.)
► High input impedance
► Low input capacitance (80pF typ.)
► Fast switching speeds
► Low on-resistance
► Free from secondary breakdown
► Low input and output leakageApplications
► Logic level interfaces – ideal for TTL and CMOS
► Solid state relays
► Battery operated systems
► Photo voltaic drives
► Analog switches
► General purpose line drivers
► Telecom switches

应用 Application

► Logic level interfaces – ideal for TTL and CMOS
► Solid state relays
► Battery operated systems
► Photo voltaic drives
► Analog switches
► General purpose line drivers
► Telecom switches