TMS320F2803x Real-Time Microcontrollers

1 Features • High-efficiency 32-bit CPU (TMS320C28x) – 60MHz (16.67ns cycle time) – 16 × 16 and 32 × 32 MAC operations – 16 × 16 dual MAC – Harvard bus architecture – Atomic operations – Fast interrupt response and processing – Unified memory programming model – Code-efficient (in C/C++ a

文件：4.03702 Mbytes 页数：175 Pages

TI

德州仪器

TMS320F2803x Real-Time Microcontrollers

1 Features • High-efficiency 32-bit CPU (TMS320C28x) – 60MHz (16.67ns cycle time) – 16 × 16 and 32 × 32 MAC operations – 16 × 16 dual MAC – Harvard bus architecture – Atomic operations – Fast interrupt response and processing – Unified memory programming model – Code-efficient (in C/C++ a

文件：4.03702 Mbytes 页数：175 Pages

TI

德州仪器

TMS320F2803x Real-Time Microcontrollers

1 Features • High-efficiency 32-bit CPU (TMS320C28x) – 60MHz (16.67ns cycle time) – 16 × 16 and 32 × 32 MAC operations – 16 × 16 dual MAC – Harvard bus architecture – Atomic operations – Fast interrupt response and processing – Unified memory programming model – Code-efficient (in C/C++ a

文件：4.03702 Mbytes 页数：175 Pages

TI

德州仪器

TMS320F2803x Real-Time Microcontrollers

1 Features • High-efficiency 32-bit CPU (TMS320C28x) – 60MHz (16.67ns cycle time) – 16 × 16 and 32 × 32 MAC operations – 16 × 16 dual MAC – Harvard bus architecture – Atomic operations – Fast interrupt response and processing – Unified memory programming model – Code-efficient (in C/C++ a

文件：4.03702 Mbytes 页数：175 Pages

TI

德州仪器

TMS320F2803x Real-Time Microcontrollers

1 Features • High-efficiency 32-bit CPU (TMS320C28x) – 60MHz (16.67ns cycle time) – 16 × 16 and 32 × 32 MAC operations – 16 × 16 dual MAC – Harvard bus architecture – Atomic operations – Fast interrupt response and processing – Unified memory programming model – Code-efficient (in C/C++ a

文件：4.03702 Mbytes 页数：175 Pages

TI

德州仪器

TMS320F2803x Real-Time Microcontrollers

1 Features • High-efficiency 32-bit CPU (TMS320C28x) – 60MHz (16.67ns cycle time) – 16 × 16 and 32 × 32 MAC operations – 16 × 16 dual MAC – Harvard bus architecture – Atomic operations – Fast interrupt response and processing – Unified memory programming model – Code-efficient (in C/C++ a

文件：4.03702 Mbytes 页数：175 Pages

TI

德州仪器

TMS320F2803x Real-Time Microcontrollers

1 Features • High-efficiency 32-bit CPU (TMS320C28x) – 60MHz (16.67ns cycle time) – 16 × 16 and 32 × 32 MAC operations – 16 × 16 dual MAC – Harvard bus architecture – Atomic operations – Fast interrupt response and processing – Unified memory programming model – Code-efficient (in C/C++ a

文件：4.03702 Mbytes 页数：175 Pages

TI

德州仪器

TMS320F2803x Real-Time Microcontrollers

1 Features • High-efficiency 32-bit CPU (TMS320C28x) – 60MHz (16.67ns cycle time) – 16 × 16 and 32 × 32 MAC operations – 16 × 16 dual MAC – Harvard bus architecture – Atomic operations – Fast interrupt response and processing – Unified memory programming model – Code-efficient (in C/C++ a

文件：4.03702 Mbytes 页数：175 Pages

TI

德州仪器

TMS320F2803x Real-Time Microcontrollers

1 Features • High-efficiency 32-bit CPU (TMS320C28x) – 60MHz (16.67ns cycle time) – 16 × 16 and 32 × 32 MAC operations – 16 × 16 dual MAC – Harvard bus architecture – Atomic operations – Fast interrupt response and processing – Unified memory programming model – Code-efficient (in C/C++ a

文件：4.03702 Mbytes 页数：175 Pages

TI

德州仪器

TMS320F2803x Real-Time Microcontrollers

1 Features • High-efficiency 32-bit CPU (TMS320C28x) – 60MHz (16.67ns cycle time) – 16 × 16 and 32 × 32 MAC operations – 16 × 16 dual MAC – Harvard bus architecture – Atomic operations – Fast interrupt response and processing – Unified memory programming model – Code-efficient (in C/C++ a

文件：4.03702 Mbytes 页数：175 Pages

TI

德州仪器