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TLV320AIC12IDBT.A

丝印:320AIC12I;Package:TSSOP(DBT);LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC

FEATURES · Mono 16-Bit Oversampling Sigma-Delta A/D Converter · Mono 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow the DSP Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Samplin

文件:2.12866 Mbytes 页数:66 Pages

TI

德州仪器

TLV320AIC12IDBTR

丝印:320AIC12I;Package:TSSOP(DBT);LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC

FEATURES · Mono 16-Bit Oversampling Sigma-Delta A/D Converter · Mono 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow the DSP Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Samplin

文件:2.12866 Mbytes 页数:66 Pages

TI

德州仪器

TLV320AIC12IDBTR.A

丝印:320AIC12I;Package:TSSOP(DBT);LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC

FEATURES · Mono 16-Bit Oversampling Sigma-Delta A/D Converter · Mono 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow the DSP Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Samplin

文件:2.12866 Mbytes 页数:66 Pages

TI

德州仪器

TLV320AIC12IDBTRG4

丝印:320AIC12I;Package:TSSOP(DBT);LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC

FEATURES · Mono 16-Bit Oversampling Sigma-Delta A/D Converter · Mono 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow the DSP Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Samplin

文件:2.12866 Mbytes 页数:66 Pages

TI

德州仪器

TLV320AIC12IDBTRG4.A

丝印:320AIC12I;Package:TSSOP(DBT);LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC

FEATURES · Mono 16-Bit Oversampling Sigma-Delta A/D Converter · Mono 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow the DSP Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Samplin

文件:2.12866 Mbytes 页数:66 Pages

TI

德州仪器

TLV320AIC12K

LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC

FEATURES · Mono 16-Bit Oversampling Sigma-Delta A/D Converter · Mono 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow the DSP Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Samplin

文件:2.12866 Mbytes 页数:66 Pages

TI

德州仪器

TLV320AIC12KIDBT

LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC

FEATURES · Mono 16-Bit Oversampling Sigma-Delta A/D Converter · Mono 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow the DSP Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Samplin

文件:2.12866 Mbytes 页数:66 Pages

TI

德州仪器

TLV320AIC12KIDBT.A

LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC

FEATURES · Mono 16-Bit Oversampling Sigma-Delta A/D Converter · Mono 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow the DSP Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Samplin

文件:2.12866 Mbytes 页数:66 Pages

TI

德州仪器

TLV320AIC12KIDBTR

LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC

FEATURES · Mono 16-Bit Oversampling Sigma-Delta A/D Converter · Mono 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow the DSP Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Samplin

文件:2.12866 Mbytes 页数:66 Pages

TI

德州仪器

TLV320AIC12KIDBTR.A

LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC

FEATURES · Mono 16-Bit Oversampling Sigma-Delta A/D Converter · Mono 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow the DSP Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Samplin

文件:2.12866 Mbytes 页数:66 Pages

TI

德州仪器

技术参数

  • Number of DAC channels (#):

    1

  • Digital audio interface:

    DSP

  • Analog inputs:

    3

  • Sampling rate (Max) (kHz):

    26

  • Rating:

    Catalog

  • ADC SNR (Typ) (dB):

    84

  • DAC SNR (Typ) (dB):

    92

供应商型号品牌批号封装库存备注价格
TI德州仪器
22+
24000
原装正品现货,实单可谈,量大价优
询价
TI
23+
QFN32
3700
绝对全新原装!现货!特价!请放心订购!
询价
TI
25+
QFN32
970
⊙⊙新加坡大量现货库存,深圳常备现货!欢迎查询!⊙
询价
TI
25+
QFN
10
百分百原装正品 真实公司现货库存 本公司只做原装 可
询价
TI
23+
TSSOP
5000
原装正品,假一罚十
询价
TI
11+
QFN32
8000
全新原装,绝对正品现货供应
询价
TI
08+
TSSOP30
2500
原装现货价格有优势量大可以发货
询价
TI
24+
XCEPT
6000
进口原装正品假一赔十,货期7-10天
询价
TI
24+
TSSOP30
120
询价
TEXASINSTRU
24+
原封装
1740
原装现货假一罚十
询价
更多TLV320AIC12供应商 更新时间2025-12-1 8:01:00