CHROMINANCE COMBINATION

文件：186.17 Kbytes 页数：4 Pages

FAIRCHILD

仙童半导体

CHROMINANCE COMBINATION

ONSEMI

安森美半导体

N-Channel Enhancement-Mode Vertical DMOS FETs

Low Threshold DMOS Technology These low threshold enhancement-mode (normally-off) transistors utilize a vertical DMOS structure and Supertexs well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the

文件：478.02 Kbytes 页数：4 Pages

SUTEX

N-Channel Enhancement-Mode Vertical DMOS FETs

Low Threshold DMOS Technology These low threshold enhancement-mode (normally-off) transistors utilize a vertical DMOS structure and Supertexs well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the

文件：478.02 Kbytes 页数：4 Pages

SUTEX

P-Channel Enhancement-Mode Vertical DMOS FETs

Low Threshold DMOS Technology These low threshold enhancement-mode (normally-off) transistors utilize a vertical DMOS structure and Supertexs wellproven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the h

文件：456.39 Kbytes 页数：4 Pages

SUTEX