UltraCMOS® High-speed FET and GaN Transistor Driver, 20 MHz

Features •TID = 100 krad(Si)•SEL Immune•High- and Low-side FET drivers•Dead-time control•Fast propagation delay, 9 ns•Tri-state enable mode•Sub-nanosecond rise and fall time•2 A / 4 A peak source/sink current•Bumped flip chip die Applications •dc–dc conversions •ac–dc conversions •Orbital P

文件：1.39094 Mbytes 页数：16 Pages

TELEDYNE

华特力科

UltraCMOS® High-speed FET and GaN Transistor Driver, 20 MHz

Features •TID = 100 krad(Si)•SEL Immune•High- and Low-side FET drivers•Dead-time control•Fast propagation delay, 9 ns•Tri-state enable mode•Sub-nanosecond rise and fall time•2 A / 4 A peak source/sink current•Bumped flip chip die Applications •dc–dc conversions •ac–dc conversions •Orbital P

文件：1.39094 Mbytes 页数：16 Pages

TELEDYNE

华特力科

Dual N-Channel Enhancement-Mode Vertical DMOS FETs

Low Threshold DMOS Technology These dual low threshold enhancement-mode (normally-off) transistors utilize a vertical DMOS structure and Supertexs wellproven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with

文件：81.29 Kbytes 页数：4 Pages

SUTEX

Dual N-Channel Enhancement-Mode Vertical DMOS FET

General Description This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input i

文件：494.35 Kbytes 页数：6 Pages

SUTEX

Dual N-Channel Enhancement-Mode Vertical DMOS FETs

Low Threshold DMOS Technology These dual low threshold enhancement-mode (normally-off) transistors utilize a vertical DMOS structure and Supertexs wellproven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with

文件：81.29 Kbytes 页数：4 Pages

SUTEX

Dual N-Channel Enhancement-Mode Vertical DMOS FET

General Description This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input i

文件：494.35 Kbytes 页数：6 Pages

SUTEX

240V, 6.0 Ohm, Dual N-Channel, Enhancement-Mode, Vertical DMOS FET

This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure andwell-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input impedance and positive temperature c • Dual N-channel devices\n• Low threshold – 2.0V max.\n• High input impedance\n• Low input capacitance – 125pF max.\n• Fast switching speeds\n• Low on-resistance\n• Free from secondary breakdown\n• Low input and output leakage;

Microchip

微芯科技

Power Solutions

Teledyne e2v

Dual N-Channel Enhancement-Mode Vertical DMOS FETs

Microchip

微芯科技