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TC74HC107AFN中文资料东芝数据手册PDF规格书
TC74HC107AFN规格书详情
Dual J-K Flip Flop with Clear
The TC74HC107A is a high speed CMOS DUAL J-K FLIP FLOP fabricated with silicon gate C2MOS technology.
It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation.
In accordance with the logic levels applied to the J and K inputs, the outputs change state on the negative going transition of the clock pulse.
CLR is independent of the clock and is accomplished by a low logic level on the input.
All inputs are equipped with protection circuits against static discharge or transient excess voltage.
Features
• High speed: fmax = 75 MHz (typ.) at VCC = 5 V
• Low power dissipation: ICC = 2 μA (max) at Ta = 25°C
• High noise immunity: VNIH = VNIL = 28 VCC (min)
• Output drive capability: 10 LSTTL loads
• Symmetrical output impedance: |IOH| = IOL = 4 mA (min)
• Balanced propagation delays: tpLH ∼ − tpHL
• Wide operating voltage range: VCC (opr) = 2~6 V
• Pin and function compatible with 74LS107
产品属性
- 型号:
TC74HC107AFN
- 制造商:
TOSHIBA
- 制造商全称:
Toshiba Semiconductor
- 功能描述:
CMOS Digital Integrated Circuit Silicon Monolithic Dual J-K Flip Flop with Clear
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
TOSHIBA |
24+ |
DIP |
80000 |
只做自己库存,全新原装进口正品假一赔百,可开13%增 |
询价 | ||
Toshiba |
84+ |
DIP |
22 |
原装 |
询价 | ||
TOSHIBA/东芝 |
24+ |
NA/ |
5664 |
原厂直销,现货供应,账期支持! |
询价 | ||
24+ |
N/A |
72000 |
一级代理-主营优势-实惠价格-不悔选择 |
询价 | |||
TOSHIBA |
11+ |
SOP16 |
8000 |
全新原装,绝对正品现货供应 |
询价 | ||
TOSHIBA/东芝 |
2447 |
DIP |
100500 |
一级代理专营品牌!原装正品,优势现货,长期排单到货 |
询价 | ||
TOSHIBA/东芝 |
23+ |
SOP |
50000 |
全新原装正品现货,支持订货 |
询价 | ||
TOSHIBA |
1844+ |
SOP |
9852 |
只做原装正品假一赔十为客户做到零风险!! |
询价 | ||
TOSHIBA/东芝 |
22+ |
DIP14 |
36363 |
原装正品现货 |
询价 | ||
TOS |
2001 |
DIP |
47 |
原装现货海量库存欢迎咨询 |
询价 |