TC58NS256DC中文资料东芝数据手册PDF规格书

256-MBIT (32M × 8 BITS) CMOS NAND E2PROM (32M BYTE SmartMedia™)

DESCRIPTION

The TC58NS256 is a single 3.3-V 256-Mbit (276,824,064) bit NAND Electrically Erasable and Programmable Read-Only Memory (NAND E2PROM) organized as 528 bytes × 32 pages × 2048 blocks. The device has a 528-byte static register which allows program and read data to be transferred between the register and the memory cell array in 528-byte increments. The Erase operation is implemented in a single block unit (16 Kbytes + 512 bytes: 528 bytes × 32 pages).

FEATURES

• Organization

Memory cell array 528 × 64K × 8

Register 528 × 8

Page size 528 bytes

Block size (16K + 512) bytes

• Modes

Read, Reset, Auto Page Program,

Auto Block Erase, Status Read

• Mode control

Serial input/output, Command control

• Complies with the SmartMediaTM Electrical

Specification and Data Format Specification

issued by the SSFDC Forum

• Power supply

VCC = 3.3 V ± 0.3 V

• Access time

Cell array-register 25 µs max

Serial Read cycle 50 ns min

• Operating current

Read (50-ns cycle) 10 mA typ.

Program (avg.) 10 mA typ.

Erase (avg.) 10 mA typ.

Standby 100 µA max

• Package

TC58NS256DC: FDC-22A (Weight: 1.8 g typ.)