TAMC900-DOC中文资料TEWS数据手册PDF规格书

Application Information

The TAMC900 is a high speed, high performance analog to digital converter AdvancedMC. In addition to the eight high speed ADCs, it provides excessive preprocessing power by a Virtex-5 FPGA and high speed on board memory for e.g. full bandwidth snapshots.

A Virtex-5 LX30T is assembled on the TAMC900-10R. The TAMC900-25R is assembled with a Virtex-5 SX35T.

AMC Port 4-11 on the TAMC900-10R or Port 0, 1 and 4-9 on the TAMC900-25R can be used to transmit the ADC data to the CPU.

To adapt the TAMC900 to different customer requirements, the TAMC900 is equipped with a Signal Conditioning Adapter (SiCA) that contains the front panel with the connectors for the analog inputs, clock and trigger inputs and the analog signal conditioning.

The TAMC900 provides three clock inputs and three trigger inputs. The three external clock inputs and the PCIe reference clock are routed to a flexible clocking

scheme that allows independent clocking of the ADCs in two groups. The trigger inputs are routed to the FPGA.

Eight LTC2254 ADCs provide up to 105 MSps and 14 bit resolution each. The minimum sample rate is 1 Msps.

4 MByte high speed on board QDR-II SRAM enables snapshots of all ADCs at full speed and full resolution for 2ms.

According to AMC.0, the TAMC900 provides an IPMI compliant Module Management Controller (MMC) with temperature monitoring and hot-swap support.

The TAMC900 is delivered with a basic firmware, which allows gathering ADC data from all channels, triggering, clock configuration, and uses a PCIe x4 Link (AMC Port 4-7) to transmit ADC data to the CPU. Driver and Example Application for the basic firmware are available for different operating systems.