T35L6464A-5L中文资料凯钰科技数据手册PDF规格书

GENERAL DESCRIPTION

The Taiwan Memory Technology Synchronous Burst RAM family employs: high-speed, low power CMOS design using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high valued resistors.

FEATURES

• Fast Access times: 5, 6, 7, and 8ns

• Fast clock speed: 100, 83, 66, and 50 MHz

• Provide high performance 3-1-1-1 access rate

• Fast OE access times: 5 and 6ns

• Single 3.3V +10 / -5V power supply

• Common data inputs and data outputs

• BYTE WRITE ENABLE and GLOBAL WRITE control

• Five chip enables for depth expansion and address pipelining

• Address, control, input, and output pipelined registers

• Internally self-timed WRITE cycle

• WRITE pass-through capability

• Burst control pins ( interleaved or linear burst sequence)

• High density, high speed packages

• Low capacitive bus loading

• High 30pF output drive capability at rated access time

• SNOOZE MODE for reduced power standby

• Single cycle disable ( PentiumT M BSRAM compatible )