SY89534L数据手册集成电路（IC）的时钟发生器PLL频率合成器规格书PDF

描述 Description

The SY89534L and SY89535L programmable clock synthesizers are a 3.3V, high-frequency, precision PLL-based family optimized for multi-frequency, large clock-tree applications that require the highest precision. These devices integrate the following blocks into a single monolithic IC:PLL (Phase-Lock-Loop)-based synthesizerFanout bufferClock generator (divider)Logic translation (LVPECL, LVDS)The SY89534L and SY89535L includes a flexible input design that accepts any reference input; single-ended LVTTL/CMOS, SSTL and differential LVPECL, LVDS, HSTL, and CML.This level of integration minimizes the additive jitter and part-to-part skew associated with the discrete alternative, resulting in superior system-level timing as well as reduced board space and power. For applications that must interface to a crystal oscillator, see the SY89532/33.

特性 Features

• Integrated synthesizer plus fanout buffers, clock dividers, and translator in a single 64-pin package
• Accepts any reference input between 14MHz to 160MHz (single-ended or differential)
• 33MHz to 500MHz output frequency range
• LVPECL outputs (SY89534L)
• LVPECL and LVDS outputs (SY89535L)
• 3.3V ±10% power supply
• Low jitter: <50ps cycle-to-cycle
• Low pin-to-pin skew: <50ps
• TTL/CMOS compatible control logic
• 3 independently programmable output frequency banks:
• 9 differential output pairs @BankB (LVPECL/LVDS)
• 2 differential output pairs @BankA (LVPECL)
• 2 differential output pairs @BankC (LVPECL)
• Available in 64-pin EPAD-TQFP
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简介

SY89534L属于集成电路（IC）的时钟发生器PLL频率合成器。由制造生产的SY89534L时钟发生器，PLL，频率合成器时钟发生器、PLL 和频率合成器集成电路 (IC) 可为逻辑器件提供参考信号的稳定定时脉冲，这些器件包括计算机、微控制器、数据通信系统和图形/视频发生器。这些集成电路可能包括缓冲器、驱动器、分频器、倍频器、多路复用器、合成器、扇出分配器和预分频器。