SY89429A中文资料fully differential frequency synthesizer jitter attenuating数据手册Microchip规格书

描述 Description

NOT RECOMMENDED FOR NEW DESIGNSThe SY89429A is fully differential frequency synthesizer jitter attenuating that require both serial and parallel interfaces. Its internal VCO will operate over a range of frequencies from 400 to 800MHz. The differential PECL output can be configured to be the VCO frequency divided by 2, 4, 8 or 16. With the output configured to divide the VCO frequency by 2, and with a 16MHz external quartz crystal used to provide the reference frequency, the output frequency can be specified in 1MHz steps.

特性 Features

·Improved jitter performance over SY89429
·25 to 400MHz differential PECL outputs
·±25ps peak-to-peak output jitter
·Minimal frequency over-shoot
·Synthesized architecture
·Serial 3 wire interface
·Parallel interface for power-on
·Internal quartz reference oscillator driven by quartz crystal or PECL source
·PECL output can operate with either +3.3V or +5V VCC_OUT power supply
·External loop filter optimizes performance/cost
·Applications note (AN-06) for ease of design-ins
·Available in PLCC and SOIC 28-pin packages

简介

SY89429A属于集成电路（IC）的时钟发生器PLL频率合成器。由制造生产的SY89429A时钟发生器，PLL，频率合成器时钟发生器、PLL 和频率合成器集成电路 (IC) 可为逻辑器件提供参考信号的稳定定时脉冲，这些器件包括计算机、微控制器、数据通信系统和图形/视频发生器。这些集成电路可能包括缓冲器、驱动器、分频器、倍频器、多路复用器、合成器、扇出分配器和预分频器。