DUAL SONET OC-12 CLOCK SYNTHESIZER

DESCRIPTION Micrel-Synergys SY89425 Dual Phase Locked Loop (PLL) consists of two totally separate, SONET compliant 622.08MHz clock generators on one chip. The user may select to power both PLLs or PLL A only. Each PLL produces a low-jitter OC-12/STS-12 clock rate from an input reference clock of

文件：93.85 Kbytes 页数：8 Pages

Micrel

麦瑞半导体

DUAL SONET OC-12 CLOCK SYNTHESIZER

DESCRIPTION Micrel-Synergys SY89425 Dual Phase Locked Loop (PLL) consists of two totally separate, SONET compliant 622.08MHz clock generators on one chip. The user may select to power both PLLs or PLL A only. Each PLL produces a low-jitter OC-12/STS-12 clock rate from an input reference clock of

文件：93.85 Kbytes 页数：8 Pages

Micrel

麦瑞半导体

DUAL SONET OC-12 CLOCK SYNTHESIZER

DESCRIPTION Micrel-Synergys SY89425 Dual Phase Locked Loop (PLL) consists of two totally separate, SONET compliant 622.08MHz clock generators on one chip. The user may select to power both PLLs or PLL A only. Each PLL produces a low-jitter OC-12/STS-12 clock rate from an input reference clock of

文件：93.85 Kbytes 页数：8 Pages

Micrel

麦瑞半导体

DUAL SONET OC-12 CLOCK SYNTHESIZER

Microchip

微芯科技