SY55852U数据手册集成电路（IC）的触发器规格书PDF

描述 Description

The SY55852U is a flip-flop used to synchronize data to a clock. Its differential output will reproduce and remember the value on its input at the rising edge of the clock. In addition, an asynchronous, level sensitive reset is provided. For a synchonous reset, the SY55851U AnyGate® can be used.SY55852U inputs can be terminated with a single resistor between the true and complement pins of a given input.The SY55852U is a member of Micrel's SuperLite™ family of high-speed CML logic. This family features very small packaging and 2.3V to 5.7V operation.

特性 Features

• 2.5GHz min. fMAX
• 2.3V to 5.7V power supply
• Single bit register memory
• Synchronizes 1 bit of data to a clock
• Optimized to work with SuperLite™ family
• Fully differential
• Accepts CML, PECL, LVPECL input logic levels
• Source terminated CML outputs for fast edge rates
• Available in a tiny 10-pin MSOP

简介

SY55852U属于集成电路（IC）的触发器。由制造生产的SY55852U触发器触发器是能够存储单个逻辑状态或信息“位”的基本数字存储器件。这些器件至少有两个输入；一个或多个用于传递要存储的数据，另一个用于指示存储该数据的时间点。不同的触发器类型，例如 D（延迟）、SR（置位复位）和 JK，对提供给其输入的信号有不同的响应，可用于实现不同的逻辑功能。这些器件与锁存器的不同之处在于它们是边缘敏感器件，其保持的逻辑状态仅在接收到有效时钟信号时才会改变。