SY54020AR数据手册集成电路（IC）的时钟缓冲器驱动器规格书PDF

描述 Description

The SY54020AR is a fully differential, low voltage 1.2V/1.8V/2.5V CML 1:4 Fanout Buffer with active-low Enable (/EN). The Enable is synchronous so that the outputs will only be enabled/disabled when they are already in the LOW state. This avoids any chance of generating a runt clock pulse when the device is enabled/disabled as can happen with an asynchronous control. When this device is used as a clock fanout, disabling the downstream clock may reduce system power. The SY54020AR can process clock signals as fast as 3.2 GHz or data patterns up to 3.2Gbps.The differential input includes Micrel’s unique, 3-pin input termination architecture that interfaces to LVPECL, LVDS or CML differential signals as small as 100mV (200mVpp) without any level-shifting or termination resistor networks in the signal path. For AC-coupled input interface applications, an internal voltage reference is provided to bias the VT pin. The outputs are CML, with extremely fast rise/fall times guaranteed to be less than 100ps.The SY54020AR operates from a 2.5V ±5% core supply and a 1.2V, 1.8V, or 2.5V ±5% output supply and is guaranteed over the full industrial temperature range (–40°C to +85°C).

特性 Features

·1.2V/1.8V/2.5V CML 1:4 Fanout Buffer
·Active-low Enable (/EN) input to disable the outputs
·Guaranteed AC performance over temperature and voltage:·DC-to- >3.2Gbps throughput
·DC-to >3.2GHz Clock throughput
·<320ps propagation delay (IN-to-Q)
·<20ps within-device skew
·<100ps rise/fall times

·Ultra-low jitter design·<1psRMS cycle-to-cycle jitter

·High-speed CML outputs
·2.5V ±5% VCC, 1.2V/1.8V/2.5V ±5% VCCOpower supply operation
·Industrial temperature range: -40°C to +85°C
·Available in 16-pin (3mm x 3mm) MLF® package

简介

SY54020AR属于集成电路（IC）的时钟缓冲器驱动器。由制造生产的SY54020AR时钟缓冲器，驱动器时钟缓冲器和驱动器集成电路产品族中的产品用于帮助信号在系统中传输，常用作频率/时间参考信号，以同步系统内的活动。尽管这些器件最常用到的功能就是缓冲（即，为使信号不受驱动负载的影响而从某个信号源复制信号），但是该产品族中的某些器件还能执行其他功能，例如选择性改变缓冲信号路径、按某个整数值分割信号频率，或进行所用电信号格式转换。