6-BIT D LATCH

DESCRIPTION The SY10/100E150 are 6-bit D latches with differential outputs designed for use in new, high- performance ECL systems. When both Latch Enables (LEN1, LEN2) are at a logic LOW, the latch is in the transparent mode and input data propagates through to the output. A logic HIGH on either

文件：60.6 Kbytes 页数：4 Pages

MICREL

麦瑞半导体

6-BIT D LATCH

文件：62.42 Kbytes 页数：4 Pages

MICREL

麦瑞半导体

6-BIT D LATCH

DESCRIPTION The SY10/100E150 are 6-bit D latches with differential outputs designed for use in new, high- performance ECL systems. When both Latch Enables (LEN1, LEN2) are at a logic LOW, the latch is in the transparent mode and input data propagates through to the output. A logic HIGH on either

文件：60.6 Kbytes 页数：4 Pages

MICREL

麦瑞半导体

6-BIT D LATCH

文件：62.42 Kbytes 页数：4 Pages

MICREL

麦瑞半导体

Package：28-LCC（J 形引线）；包装：管件 类别：集成电路（IC） 锁存器 描述：IC LATCH D 6-BIT 28-PLCC

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