3-BIT 4:1 MUX-LATCH

DESCRIPTION The SY10/100E256 offer three 4:1 multiplexers followed by latches with differential outputs designed for use in new, high-performance ECL systems. Separate Select controls are provided for the leading 2:1 mux pairs (see block diagram). FEATURES ■ 950ps max. data to output ■ Extende

文件：60.86 Kbytes 页数：4 Pages

MICREL

麦瑞半导体

3-BIT 4:1 MUX-LATCH

文件：63 Kbytes 页数：4 Pages

MICREL

麦瑞半导体

3-BIT 4:1 MUX-LATCH

DESCRIPTION The SY10/100E256 offer three 4:1 multiplexers followed by latches with differential outputs designed for use in new, high-performance ECL systems. Separate Select controls are provided for the leading 2:1 mux pairs (see block diagram). FEATURES ■ 950ps max. data to output ■ Extende

文件：60.86 Kbytes 页数：4 Pages

MICREL

麦瑞半导体

3-BIT 4:1 MUX-LATCH

文件：63 Kbytes 页数：4 Pages

MICREL

麦瑞半导体

Package：28-LCC（J 形引线）；包装：管件 类别：集成电路（IC） 信号开关，多路复用器，解码器 描述：IC MULTIPLEXER 3 X 4:1 28PLCC

MICROCHIP

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