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SY100S811数据手册集成电路(IC)的时钟缓冲器驱动器规格书PDF

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厂商型号

SY100S811

参数属性

SY100S811 封装/外壳为28-LCC(J 形引线);包装为管件;类别为集成电路(IC)的时钟缓冲器驱动器;产品描述:IC CLK BUFFER 2:9 28PLCC

功能描述

Fanout Buffers Products
IC CLK BUFFER 2:9 28PLCC

封装外壳

28-LCC(J 形引线)

制造商

Microchip Microchip Technology

中文名称

微芯科技 微芯科技股份有限公司

数据手册

原厂下载下载地址下载地址二

更新时间

2025-8-8 20:00:00

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SY100S811规格书详情

描述 Description

The SY100S811 is a low skew 1-to-9 PECL differential driver designed for clock distribution in new, highperformance PECL systems. It accepts either a PECL clock input or a TTL input by using the TTL enable pin TEN. When the TTL enable pin is HIGH, the TTL input is enabled and the PECL input is disabled. When the enable pin is set LOW, the TTL input is disabled and the PECL input is enabled.The device is specifically designed and produced for low skew. The interconnect scheme and metal layout are carefully optimized for minimal gate-to-gate skew within the device. Wafer characterization and process control ensure consistent distribution of propagation delay from lot to lot. Since the S811 shares a common set of \"basic\" processing with the other members of the ECLinPS family, wafer characterization at the point of device personalization allows for tighter control of parameters, including propagation delay.To ensure that the skew specification is met, it is necessary that both sides of the differential output are terminated into 50Ω, even if only one side is being used. ln most applications, all nine differential pairs will be used and, therefore, terminated. In the case where fewer than nine pairs are used, it is necessary to terminate at least the output pairs on the same package side (i.e. sharing the same VCCO as the pair(s) being used on that side) in order to maintain minimum skew.The VBB output is intended for use as a reference voltage for single-ended reception of PECL signals to that device only. When using VBB for this purpose, it is recommended that VBB is decoupled to VCC via a 0.01µF capacitor.

特性 Features

·PECL version of popular ECLinPS E111
·Low skew
·Guaranteed skew spec
·VBB output
·TTL enable input
·Selectable TTL or PECL clock input
·Single +5V supply
·Differential internal design
·Similar pin configuration to E111
·PECL I/O fully compatible with industry standard
·Internal 75KΩ PECL input pull-down resistors
·Available in 28-pin PLCC and SOIC packages

简介

SY100S811属于集成电路(IC)的时钟缓冲器驱动器。由制造生产的SY100S811时钟缓冲器,驱动器时钟缓冲器和驱动器集成电路产品族中的产品用于帮助信号在系统中传输,常用作频率/时间参考信号,以同步系统内的活动。尽管这些器件最常用到的功能就是缓冲(即,为使信号不受驱动负载的影响而从某个信号源复制信号),但是该产品族中的某些器件还能执行其他功能,例如选择性改变缓冲信号路径、按某个整数值分割信号频率,或进行所用电信号格式转换。

技术参数

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  • 制造商编号

    :SY100S811

  • 生产厂家

    :Microchip

  • Description

    :2:9

  • Input

    :PECL/TTL

  • Output

    :PECL

  • Supply Voltage

    :5V

  • Max Freq (GHz)

    :0.75

  • Max Prop Delay (ps)

    :<630

  • Icc (mA)

    :65

  • Max Within Device Skew (ps)

    :<50

  • OE

    :True

  • RPE

    :False

  • FSI

    :False

  • Input Mux

    :True

  • Input EQ

    :False

供应商 型号 品牌 批号 封装 库存 备注 价格
MREL/麦瑞
24+
NA/
3388
原厂直销,现货供应,账期支持!
询价
SYNERGY
24+
SOP
12000
原装正品 假一罚十 可拆样
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MICREL
2016+
SOP28
6528
只做进口原装现货!假一赔十!
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SYNERGY
25+
PLCC28
1000
⊙⊙新加坡大量现货库存,深圳常备现货!欢迎查询!⊙
询价
MOTOROLA
2024+
PLCC
50000
原装现货
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原厂原装
24+
SOP
9630
我们只做原装正品现货!量大价优!
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Micrel
23+
NA
2484
专做原装正品,假一罚百!
询价
MICREL/麦瑞
23+
SOP28
11200
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询价
SYNERGY
25+23+
PLCC
33628
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询价
Micrel
25+
25000
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询价