5V/3.3V LVTTL/LVCMOS-to-DIFFERENTIAL LVPECL TRANSLATOR

文件：487.85 Kbytes 页数：6 Pages

MICREL

麦瑞半导体

5V/3.3V LVTTL/LVCMOS-to-DIFFERENTIAL LVPECL TRANSLATOR

文件：74 Kbytes 页数：6 Pages

MICREL

麦瑞半导体

3.3V LVTTL/LVCMOS to Differential LVPECL Translator

3.3VLVTTL/LVCMOS to Differential LVPECL Translator The MC10EPT20 is a 3.3 V TTL/CMOS to differential PECL translator. Because PECL (Positive ECL) levels are used, only +3.3 V and ground are required. The small outline SOIC−8 package and the single gate of the EPT20 makes it ideal for those applic

文件：65.45 Kbytes 页数：8 Pages

ONSEMI

安森美半导体

Clock Management Design Using Low Skew and Low Jitter Devices

Why Do We Need Clock Management? Can you imagine the chaos in our world if our clocks or watches were not synchronized to Greenwich Mean Time? How would trains, buses, and airplanes run on schedule? The miniseries Longitude was the story of a man who made a major technological breakthrough by inv

文件：209.34 Kbytes 页数：8 Pages

ONSEMI

安森美半导体

3.3V LVTTL/LVCMOS to Differential LVPECL Translator

文件：140.95 Kbytes 页数：10 Pages

ONSEMI

安森美半导体