9-BIT LATCH WITH PARITY

DESCRIPTION The SY10/100E175 are 9-bit latches. They also feature a tenth latched output (ODDPAR) which is formed as the odd parity of the nine data inputs (ODDPAR is HIGH if an odd number of the inputs are HIGH). The E175 can also be used to generate byte parity by using D8 as the parity-type s

文件：60.34 Kbytes 页数：4 Pages

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9-BIT LATCH WITH PARITY

文件：62.28 Kbytes 页数：4 Pages

MICREL

麦瑞半导体

9-BIT LATCH WITH PARITY

Microchip

微芯科技

9-BIT LATCH WITH PARITY

DESCRIPTION The SY10/100E175 are 9-bit latches. They also feature a tenth latched output (ODDPAR) which is formed as the odd parity of the nine data inputs (ODDPAR is HIGH if an odd number of the inputs are HIGH). The E175 can also be used to generate byte parity by using D8 as the parity-type s

文件：60.34 Kbytes 页数：4 Pages

MICREL

麦瑞半导体

9-BIT LATCH WITH PARITY

DESCRIPTION The SY10/100E175 are 9-bit latches. They also feature a tenth latched output (ODDPAR) which is formed as the odd parity of the nine data inputs (ODDPAR is HIGH if an odd number of the inputs are HIGH). The E175 can also be used to generate byte parity by using D8 as the parity-type s

文件：60.34 Kbytes 页数：4 Pages

MICREL

麦瑞半导体

9-BIT LATCH WITH PARITY

文件：62.28 Kbytes 页数：4 Pages

MICREL

麦瑞半导体

9-BIT LATCH WITH PARITY

文件：62.28 Kbytes 页数：4 Pages

MICREL

麦瑞半导体

9-BIT LATCH WITH PARITY

文件：62.28 Kbytes 页数：4 Pages

MICREL

麦瑞半导体

9-BIT LATCH WITH PARITY

文件：62.28 Kbytes 页数：4 Pages

MICREL

麦瑞半导体

Package：28-LCC（J 形引线）；包装：管件 类别：集成电路（IC） 锁存器 描述：IC LATCH 9-BIT W/PARITY 28-PLCC

MICROCHIP

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